1. Field of the Invention
The present invention relates to a three-terminal insulated-gate power electronic device with a variable-slope saturated output characteristic depending in a discontinuous way on the output current.
2. Discussion of the Related Art
Modern Lamp ballast circuits make use of Power MOS transistors, which combine fast switching performance with ease of driving. In such circuits, the required value for the Power MOS transistor "on" resistance (Ron) in saturation condition is about 1.2 ohm. Since in steady-state operating conditions the current flowing through the Power MOS transistor is in the range of 200-400 mA, the power dissipated by the Power MOS transistor is not of concern. The problem arises during the circuit start-up, when currents of the order of 5 A are necessary. During startup, the power dissipation in the Power MOS transistor becomes significant, as the voltage drop across the power MOS transistor can reach 6 V.
This problem is related to the linearity of the output current-voltage characteristic of the Power MOS transistor, wherein the output resistance is substantially constant and independent of the output current.
Another well-known power electronic device includes a MOSFET designed for high voltages (e.g. 650 V) and a bipolar power transistor connected in a darlington configuration, with the MOSFET drain and source electrodes connected respectively to the bipolar transistor collector and base electrodes. This device, called an "Insulated Gate Darlington" (IGD), exhibits a saturation output resistance which, for high collector currents, is much lower than that of a MOS field effect transistor, so that even when currents of some Amperes flow, the power dissipation and the voltage drop across the power device are kept low. For low collector currents, however, the output resistance of the IGD is higher than that of a MOS field effect transistor, resulting in excessive power dissipation during the steady state operation.
A possible solution to the problem of excessive power dissipation during steady state operation in the IGD includes the connection of a low value resistor (e.g. 1 ohm) in parallel with the base-emitter junction of the power bipolar transistor. In this manner, the saturated output characteristic of the overall device is MOSFET-type for low output currents and bipolar-type for high output currents. The output resistance in the MOSFET-type region of the output characteristic is given by the sum of the MOSFET on-resistance plus 1 ohm. If the ballast circuit is designed for working with a resistance value of 1-2 ohm, the MOSFET on-resistance must be 0.2 ohm. Such a low value is not common or practical to achieve in high-voltage MOSFETS. On the other hand, the resistance value of the base-emitter resistor cannot be significantly reduced, since this would result in an excessively high current flowing through the MOSFET when the power bipolar transistor is on (such current is in fact given by V.sub.BE /R, where V.sub.BE is the voltage across the base-emitter junction of the power bipolar transistor in saturation, typically 650 mV, and R is the resistance value of the base-emitter resistor). A high current flowing through the MOSFET is again responsible for a high voltage drop across it, and therefore is responsible for an excessive power dissipation.
In view of the state of the prior art described, an object of the present invention is to provide a three-terminal power electronic device which does not causes excessive power dissipation either for low output currents or for high output currents. The three-terminal device may be suitable for use in ballast circuits without being affected by the above mentioned drawbacks.